EL - 204

Digital Electronics

Lab #3 Logic Gate Applications

Andrew Buettner

March 6, 2003

Objective

The objective of this lab is to observe the use of logic gates. To do his simple logic functions will be implemented using gates. Also use clock signals and enables to enable those gates. Additionally this lab will demonstrate the use of timing diagrams to determine timing relationships between individual variables.

Equipment Used

1) ET - 3600 Trainer

2) 7400 TTL 2 input NAND

3) 7404 HEX inverter

4) Logic Probe

5) Logic Pulser

Procedure

1) Assemble the following circuit:

2) Set the enable switch to off.

3) Operate Switches A and B and note the results.

4) Set the enable switch to on

5) Repeat step 3

Results

A) Enable switch set to off:

Switch Status:

On

Off

Sw1 / LED 1

Off

Off

Sw2 / LED 2

Off

Off

B) Enable switch set to on:

Switch Status:

On

Off

Sw1 / LED 1

Blinking

Off

Sw2 / LED 2

Blinking

Off

Answers to Lab Questions

1) Q: Redraw the circuit using only NOR gates:

A:

2) Q: How many tests are required to completely test this circuit, and how many would be required if an additional display, data switch, and gate were added?

A: It takes four tests to test this circuit fully since the data switches control circuits that are independent of each other. Therefore any additional switches will not require additional tests.

3) Q: If the data is gated to the display regardless of the enable, what is a possible problem?

A: There could be a short between the enable and data switches, or the enable switch could be shorted it's self.

4) Q: If no power is supplied to circuit G4 what will the measured voltages to circuit G2 be?

A: Pin 1 will be low (0v) pin 2 will either be low or high depending on the position of the switch.

Conclusions

From this lab, the operation of the 7400 NAND gate and the 7404 HEX inverter is clearly demonstrated. Further this lab demonstrates how simple logic gates can be used to build larger logic functions. Also this lab demonstrated how an enable circuit affects the operation of a gate.

Attachments

* Lab data previously submitted *

* No calculations were needed or required for this lab *